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A combinational circuit accepts TWO 2-bit binary numbers

`x`

and

`Y`

(

`x`

is denoted as

`AB`

and

`Y`

is denoted as

`CD`

, where

`A,B,C`

and

`D`

are binary variables) and performs a division (see the table below). Outputs of the circuit are the quotient (express in binary, denoted as

`PQ`

) and the remainder (express in binary, denoted as

`RS`

) of the division and

`S`

are binary variables). Whenever there is a "division-by-zero" situation, don't care conditions can be used as the outputs. For example, if your student ID number is 22367384A (

`8^(th )`

digit

`=4`

, which is even), then case 1 is used. use the following STUDENT ID to find solution STUDENT ID

`=21084996`

(a) Design the combinational circuit above. Show the design steps in your answer (starting from the truth table of the circuit, and follow the steps described in lecture), and draw one circuit diagram using AND gates, OR gates and inverters as the implementation. Use the format below for your truth table. (b) Use a 4-to-1-line QUAD multiplexer to implement the outputs of the circuit in part (a) above. In your design, connect the leftmost two bits of the inputs to the selection lines of the multiplexer. Use a block diagram with appropriate labels for inputs and outputs to represent the multiplexer (i.e., you do not need to draw the internal structures of the multiplexer).