Consider a cache system using 2-bit LRU system for 4 way set associative cache system. If the CPU reads the main memory in following sequence 1. Read 1 to set 1 page 1 . 2. Read 2 to set 1 page 2 . 3. Read 3 to set 10 page 3 . 4. Read 4 to set 1 page 4 . 5. Read 5 to set 1 page 10 . then Read 6 to set 11 page 10 Read 7 to set 1 page 10 Read 8 to s

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Consider a cache system using 2-bit LRU system for 4 way set associative cache system. If the CPU reads the main memory in following sequence 1. Read 1 to set 1 page 1 . 2. Read 2 to set 1 page 2 . 3. Read 3 to set 10 page 3 . 4. Read 4 to set 1 page 4 . 5. Read 5 to set 1 page 10 . then Read 6 to set 11 page 10 Read 7 to set 1 page 10 Read 8 to set 1 page 11 Read 9 to set 1 page 12 Read 10 to set 1 page 12

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