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Consider the computer system shown in the figure below: 12.8 GB/s 350 MB/s North bridge CPU The ba ...
Consider the computer system shown in the figure below: 12.8 GB/s 350 MB/s North bridge CPU The bandwidths of the devices are: Device Bandwidth (Byte/s) Front Side Bus 12.8x10? Memory 3.2x10? 350x106 North-South Bus I/O Device 250x106 Assume that the CPU needs an average of 4 bits from memory and 0.2 bits from the I/O device in order to execute an instruction while running a program. a. Show the maximum instruction execution rates (in MIPS) that each device can sustain. What is the maximum sustainable MIPS of the system (assume that the CPU is not the bottleneck in the system)? Front Side Bus: Memory: North/South Bridge Bus: I/O device: b. Suppose that the CPU has a clock speed of 1.8 GHz and it can execute 3 instructions per cycle on average (since it is a multi issue processor). What is the bottleneck in the system now? 3.2 GB/s Memory South bridge 250 MB/s 1/0 Device