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(Solved): Consider the on-resistance of NMOS to be 200 ohms and off-resistance to be 3200 ohms and for PMOS on ...



Consider the on-resistance of NMOS to be 200 ohms and off-resistance to be 3200 ohms and for PMOS on-resistance is 800 ohms and off-resistance is 12800 ohms. Now imagine the output of this inverter is connected to the input of some digital circuit X. The connecting path has a maximum noise of +-300mV. What should the VIH (Min) be for circuit X to sample the NMOS inverter output reliably? (Take VDD = 5V)



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