Exercises 11.1 List the basic types of shift registers in terms of data movement. 11.2 Complete the timing diagram for a 4 -bit data register. The register is positiveed 11.3 Complete the timing diagram for a 4-bit SIPO shift register. Write the output in binary form. The register is positive-edge triggered. The initial value of ABCD is 1001 11.4 A

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Exercises 11.1 List the basic types of shift registers in terms of data movement. 11.2 Complete the timing diagram for a 4 -bit data register. The register is positiveed 11.3 Complete the timing diagram for a 4-bit SIPO shift register. Write the output in binary form. The register is positive-edge triggered. The initial value of

ABCD

is 1001 11.4 A four-bit universal shift register contains 0010. Ones are applied to the shift-left and the shift-right serial data inputs. The register is in the shift-right mode for one clock cycle followed by the shift-left mode for three clock pulses. What the final state of the shift register.

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